AMD launches EPYC processor brand for the datacenter

Essential features include dynamic dual-socket systems and disruptive single-socket platforms

AMD launches EPYC processor brand for the datacenter - ITNEXT

AMD introduces EPYC processor brand for the datacenter, bringing in a revolution in the high-performance server processor market. With its high core count, superior memory bandwidth, and unparalleled support for high-speed input/output channels in a single chip, EPYC intends to transform the dual-socket server market while simultaneously reshaping expectations for single-socket servers. Earlier codenamed “Naples,” this new family of high-performance products for cloud-based and traditional on-premise datacenters will deliver the highly successful “Zen” x86 processing engine scaling up to 32 physical cores. The first EPYC-based servers will launch in June with large-scale support from original equipment manufacturers (OEMs) and channel partners.


“With the new EPYC processor, AMD takes the next step on our journey in high-performance computing,” said Forrest Norrod, Senior Vice President and General Manager of Enterprise, Embedded & Semi-Custom Products. “AMD EPYC processors will set a new standard for two-socket performance and scalability. We see further opportunity with the industry’s first no-compromise one-socket solutions. We believe that this new product line-up has the potential to reshape significant portions of the datacenter market with its unique combination of performance, design flexibility, and disruptive TCO."


A single EPYC processor exceeds the performance of a competitive mid-range, two-socket / two-processor platform in a head-to-head comparison. EPYC exceeds this competitive offering on key parameters, with 45% more cores, 60% more input/output capacity (I/O), and 122% more memory bandwidth.


Some of the key features of the new EPYC processor are:


  • A highly scalable, 32-core System-on-a-chip (SoC) design, with support for two high-performance threads per core


  • Industry-leading memory bandwidth, with 8 channels of memory per EPYC device. In a dual-socket server, support for up to 32 DIMMS of DDR4 on 16 memory channels, delivering up to 4 terabytes of total memory capacity


  • Complete SoC with fully integrated, high-speed I/O supporting 128 lanes of PCIe3, negating the need for a separate chip-set


  • Highly-optimized cache structure for high-performance, energy-efficient computing


  • Infinity Fabric coherent interconnect for two EPYC CPUs in a dual-socket system


  • Dedicated security hardware


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